Normal view MARC view ISBD view

Yield modelling and defect tolerance in VLSI papers presented at the International Workshop on Designing for Yield, Oxford 1-3 July 1987

Yield modelling and defect tolerance in VLSI papers presented at the International Workshop on Designing for Yield, Oxford 1-3 July 1987 edited by Will Moore, Wojciech Maly and Andrzej Strojwas - Bristol Adam Hilger 1987 - vi, 282 p. : ill. ; 24 cm.

ISBN: 085274398x

Subjects--Topical Terms:
Electronic apparatus and appliances--Design and constructio n
Electronic industries--Equipment and supplies

Place hold
Print
Save record
BIBTEX Dublin Core MARCXML MARC (non-Unicode/MARC-8) MARC (Unicode/UTF-8) MARC (Unicode/UTF-8, Standard) MODS (XML) RIS ISBD
More searches

Search for this title in:
Other Libraries (WorldCat) Other Databases (Google Scholar) Online Stores (Bookfinder.com) Open Library (openlibrary.org)

Yield modelling and defect tolerance in VLSI papers presented at the International Workshop on Designing for Yield, Oxford 1-3 July 1987

Contact Us

Copyright ©The National University of Malaysia Library