| 000 | 01089nam a2200313 a 4500 | ||
|---|---|---|---|
| 005 | 20250913131255.0 | ||
| 008 | 981208s1990 xxu 00 eng | ||
| 020 |
_a079239058X _cRM203.11 |
||
| 035 | _a815201 | ||
| 039 | 9 |
_a201204301112 _bjamil _y08-18-1999 _zload |
|
| 040 | _aUKM | ||
| 090 | _aTK7874.B484 | ||
| 090 |
_aTK7874 _bB484 |
||
| 100 | 1 |
_aBhattacharya, Debashis, _d1961- |
|
| 245 | 1 | 0 |
_aHierarchical modeling for VLSI circuit testing / _cby Debashis Bhattacharya and John P. Hayes. |
| 260 |
_aBoston : _bKluwer Academic Publishers, _c1990 |
||
| 300 |
_a159 p. : _bill. ; _c23 cm. |
||
| 590 | _a1 | ||
| 650 | 0 |
_aIntegrated circuits _xVery large scale integration _xTesting. |
|
| 650 | 0 |
_aIntegrated circuits _xVery large scale integration _xComputer simulation. |
|
| 700 | 1 |
_aHayes, John P. _q(John Patrick), _d1944- |
|
| 907 |
_a.b1094851x _b2021-05-28 _c2019-11-12 |
||
| 942 |
_c01 _n0 _kTK7874.B484 |
||
| 914 | _avtls000098559 | ||
| 991 | _aFakulti Kejuruteraan | ||
| 998 |
_al _b1999-05-08 _cm _da _feng _gxxu _y0 _z.b1094851x |
||
| 999 |
_c96682 _d96682 |
||