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007 cr nn 008maaau
008 100623s2009 mau j eng d
020 _a9780387710563 (electronic bk.)
035 _a(Springer)978-0-387-71055-6
039 9 _y06-23-2010
_zmuhaimin
040 _aUKM
082 0 4 _a621.395
_222
090 _aTK7874.75
_b.K88 2009
100 1 _aKourtev, Ivan S.
245 1 0 _aTiming optimization through clock skew scheduling
_h[electronic resource] /
_cby Ivan S. Kourtev, Baris Taskin, Eby G. Friedman.
260 _aBoston, MA :
_bSpringer US,
_c2009.
300 _axvi, 265 p. :
_bill., digital ;
_c25 cm.
650 0 _aIntegrated circuits
_xVery large scale integration
_xDesign and construction.
650 0 _aTiming circuits
_xDesign and construction.
650 0 _aSynchronization.
650 1 _aEngineering.
650 2 _aCircuits and Systems.
650 2 _aComputer-Aided Engineering (CAD, CAE) and Design.
650 2 _aElectronic and Computer Engineering.
650 2 _aElectronics and Microelectronics, Instrumentation.
700 1 _aFriedman, Eby G.
700 1 _aTaskin, Baris.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
856 4 0 _uhttps://eresourcesptsl.ukm.remotexs.co/user/login?url=http://dx.doi.org/10.1007/978-0-387-71056-3
907 _a.b14734758
_b2024-03-21
_c2019-11-12
942 _n0
_kTK7874.75 .K88 2009
914 _avtls003434351
998 _ae
_b2010-10-06
_cm
_dz
_feng
_gmau
_y0
_z.b14734758
999 _c676958
_d676958