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020 _a9780470828519
_q(electronic bk.)
020 _a047082851X
_q(electronic bk.)
020 _a1283175169
020 _a9781283175166
020 _a9780470828502
_q(ePDF)
020 _a0470828501
_q(ePDF)
020 _a9780470828526
_q(ePub)
020 _a0470828528
_q(ePub)
020 _a9781118073315
_q(Mobi)
020 _a1118073312
_q(Mobi)
020 _z9780470828496
_q(hardback)
020 _z0470828498
_q(hardback)
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035 _a(OCoLC)739118465
_z(OCoLC)743204800
_z(OCoLC)758543273
_z(OCoLC)816850580
_z(OCoLC)832584116
035 _a(OCoLC)ocn739118465
037 _a10.1002/9780470828519
_bWiley InterScience
_nhttp://www3.interscience.wiley.com
039 9 _a201911011448
_bemilda
_y09-18-2019
_zhafiz
_wUKM UBCM Wiley MARC (363 titles).mrc
_x102
040 _aDG1
_beng
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049 _aMAIN
050 4 _aTK7895.E42
_bB3264 2011
082 0 4 _a621.39/9
_222
100 1 _aBailey, Donald G.
_q(Donald Graeme),
_d1962-
245 1 0 _aDesign for embedded image processing on FPGAs /
_cDonald G. Bailey.
264 1 _aNew York, NY :
_bWiley,
_c2011.
300 _a1 online resource
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
504 _aIncludes bibliographical references and index.
505 0 _aFront Matter -- Colour Plates -- Image Processing -- Field Programmable Gate Arrays -- Languages -- Design Process -- Mapping Techniques -- Point Operations -- Histogram Operations -- Local Filters -- Geometric Transformations -- Linear Transforms -- Blob Detection and Labelling -- Interfacing -- Testing, Tuning and Debugging -- Example Applications -- References -- Index.
520 _a'Introductory material will consider the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware that can readily exploit parallelism within many image processing algorithms. A brief review of FPGA programming languages provides the link between a software mindset normally associated with image processing algorithms, and the hardware mindset required for efficient utilization of a parallel hardware design. The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation. Particular attention is given to the techniques for mapping an algorithm onto an FPGA implementation, considering timing, memory bandwidth and resource constraints, and efficient hardware computational techniques. Extensive coverage will be given of a range of image processing operations, discussing efficient implementations and how these may vary according to the application. The techniques will be illustrated with several example applications or case studies from projects or applications I have been involves with. Issues such as interfacing between the FPGA and peripheral devices will be covered briefly, as will designing the system in such a way that it can be more readily debugged and tuned'--
_cProvided by publisher.
520 _a'The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation'--
_cProvided by publisher.
588 0 _aPrint version record.
650 0 _aEmbedded computer systems.
650 0 _aField programmable gate arrays.
655 4 _aElectronic books.
655 4 _aElectronic resource.
710 2 _aWiley InterScience (Online service)
773 0 _tWiley e-books
776 0 8 _iPrint version:
_aBailey, Donald G. (Donald Graeme), 1962-
_tDesign for embedded image processing on FPGAs.
_dNew York, NY : Wiley, 2011
_z9780470828496
_w(DLC) 2011002991
_w(OCoLC)690090010
856 4 1 _uhttps://eresourcesptsl.ukm.remotexs.co/user/login?url=https://doi.org/10.1002/9780470828519
_zWiley Online Library
907 _a.b16755972
_b2022-09-21
_c2019-11-12
942 _n0
914 _avtls003651254
998 _ae
_b2019-05-09
_cm
_dz
_feng
_gnyu
_y0
_z.b16755972
999 _c643484
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