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035 _a(OCoLC)729726229
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_z(OCoLC)742947721
_z(OCoLC)765135622
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035 _a(OCoLC)ocn729726229
037 _a10.1002/9781119995852
_bWiley InterScience
_nhttp://www3.interscience.wiley.com
039 9 _a201911011506
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_y09-18-2019
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_wUKM UBCM Wiley MARC (363 titles).mrc
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049 _aMAIN
050 4 _aTK7885.7
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072 7 _aCOM
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072 7 _aTEC
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082 0 4 _a621.39/5
_222
100 1 _aRushton, Andrew,
_d1962-
245 1 0 _aVHDL for logic synthesis /
_cAndrew Rushton.
250 _a3rd ed.
264 1 _aChichester, West Sussex, U.K. :
_bWiley,
_c2011.
300 _a1 online resource (xvi, 466 pages) :
_billustrations
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
504 _aIncludes bibliographical references and index.
505 0 _aFront Matter -- Introduction -- Register-Transfer Level Design -- Combinational Logic -- Basic Types -- Operators -- Synthesis Types -- Std_Logic_Arith -- Sequential VHDL -- Registers -- Hierarchy -- Subprograms -- Special Structures -- Test Benches -- Libraries -- Case Study -- Appendix A: Package Listings -- Appendix B: Syntax Reference -- References -- Index.
520 _a'Macrocycles: Construction, Chemistry and Nanotechnology Applications is an essential introduction this important class of molecules and describes how to synthesise them, their chemistry, how they can be used as nanotechnology building blocks, and their applications'--
_cProvided by publisher.
588 0 _aPrint version record.
650 0 _aVHDL (Computer hardware description language)
650 0 _aLogic design
_xData processing.
650 0 _aComputer-aided design.
_962173
650 0 4 _aVHDL (Bilgisayar donanımı tanımlama dili)
650 0 4 _aMantık tasarımı
_xBilgi işlem.
650 0 4 _aBilgisayar destekli tasarım.
650 4 _aVHDL (Computer hardware description language)
650 4 _aLogic design
_xData processing.
650 4 _aComputer-aided design.
_962173
650 7 _aCOMPUTERS
_xComputer Engineering.
_2bisacsh
650 7 _aCOMPUTERS
_xLogic Design.
_2bisacsh
650 7 _aTECHNOLOGY & ENGINEERING
_xElectronics
_xCircuits
_xLogic.
_2bisacsh
650 7 _aTECHNOLOGY & ENGINEERING
_xElectronics
_xCircuits
_xVLSI & ULSI.
_2bisacsh
650 7 _aComputer-aided design.
_2fast
_0(OCoLC)fst00872701
_962173
650 7 _aLogic design
_xData processing.
_2fast
_0(OCoLC)fst01002048
650 7 _aVHDL (Computer hardware description language)
_2fast
_0(OCoLC)fst01163476
650 7 _aVHDL (Computer hardware description language)
_2local
650 7 _aLogic design / Data processing.
_2local
650 7 _aComputer-aided design.
_2local
_962173
655 4 _aElectronic books.
655 4 _aLlibres electrònics.
773 0 _tWiley e-books
776 0 8 _iPrint version:
_aRushton, Andrew.
_tVHDL for logic synthesis.
_b3rd ed.
_dChichester, West Sussex, U.K. : Wiley, 2011
_z9780470688472
_w(DLC) 2010045678
_w(OCoLC)664324141
856 4 1 _uhttps://eresourcesptsl.ukm.remotexs.co/user/login?url=https://doi.org/10.1002/9781119995852
_zWiley Online Library
907 _a.b1675573x
_b2022-11-01
_c2019-11-12
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