| 000 | 01849cam a2200481 i 4500 | ||
|---|---|---|---|
| 005 | 20250919122130.0 | ||
| 008 | 180425s20172017xxua b 001 0 eng c | ||
| 010 | _a2017-446855 | ||
| 020 | _a1259837904 | ||
| 020 |
_a9781259837906 _qhardback _cRM299.00 |
||
| 035 | _a(OCoLC)ocn959648624 | ||
| 035 | _a20097045 | ||
| 039 | 9 |
_a201805211124 _bzakir _c201805211104 _dzakir _c201805171518 _dzakir _y04-25-2018 _zzakir |
|
| 040 |
_aYDX _beng _cYDX _erda _dOCLCQ _dTEF _dBDX _dYDX _dOCLCF _dOSU _dDLC |
||
| 042 | _apcc | ||
| 082 | 0 | 0 |
_a621.39/2 _223 |
| 090 | _aTK7895.G3U57 3 | ||
| 090 | 0 | 0 |
_aTK7895.G36 _bU57 3 |
| 100 | 1 |
_aUnsalan, Cem, _eauthor. |
|
| 245 | 1 | 0 |
_aDigital system design with FPGA : _bimplementation using Verilog and VHDL / Cem Unsaln, Bora Tar. |
| 264 | 1 |
_aNew York, NY : _bMcGraw-Hill Education, _c2017 |
|
| 264 | 4 | _c©2017 | |
| 300 |
_axv, 384 pages : _billustrations ; _c25 cm |
||
| 336 |
_atext _btxt _2rdacontent |
||
| 337 |
_aunmediated _bn _2rdamedia |
||
| 338 |
_avolume _bnc _2rdacarrier |
||
| 504 | _aIncludes bibliographical references and index. | ||
| 650 | 0 | _aField programmable gate arrays. | |
| 650 | 0 | _aVerilog (Computer hardware description language) | |
| 650 | 0 | _aVHDL (Computer hardware description language) | |
| 700 | 1 |
_aTar, Bora, _eauthor. |
|
| 907 |
_a.b16584156 _b2025-07-18 _c2019-11-12 |
||
| 942 |
_c01 _n0 _kTK7895.G3U57 3 |
||
| 914 | _avtls003633509 | ||
| 906 |
_a7 _bcbc _cpccadap _d2 _encip _f20 _gy-gencatlg |
||
| 990 | _azak | ||
| 991 | _aFakulti Kejuruteraan dan Alam Bina | ||
| 998 |
_al _b2018-12-04 _cm _da _feng _gxxu _y0 _z.b16584156 |
||
| 999 |
_c626833 _d626833 |
||