| 000 | 01436nam a22003618i 4500 | ||
|---|---|---|---|
| 005 | 20250919002916.0 | ||
| 008 | 150409s2014 si b 001 0 eng | ||
| 020 |
_a9781118659182 _qcloth _cRM523.60 |
||
| 039 | 9 |
_a201507211524 _batika _c201507090856 _drosli _c201506180951 _drahah _y04-09-2015 _zrahah |
|
| 040 |
_aDLC _beng _cDLC _erda _dDLC _dUKM |
||
| 090 | _aTK7885.7.J436 3 | ||
| 090 |
_aTK7885.7 _b.J436 3 |
||
| 100 | 1 |
_aJeong, Hong, _eauthor. |
|
| 245 | 1 | 0 |
_aArchitectures for computer vision : _bfrom algorithm to chip with Verilog / _cHong Jeong. |
| 246 | 3 | 0 | _aFrom algorithm to chip with Verilog |
| 264 | 1 |
_aSingapore : _bJohn Wiley & Sons Singapore Pte. Ltd., _c[2014]. |
|
| 264 | 4 | _c©2014. | |
| 300 |
_a450 pages. : _billustrations, ; _c17 cm. |
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| 336 |
_atext _2rdacontent |
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| 337 |
_aunmediated _2rdamedia |
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| 338 |
_avolume _2rdacarrier |
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| 504 | _aIncludes bibliographical references and index. | ||
| 650 | 0 | _aVerilog (Computer hardware description language) | |
| 650 | 0 | _aComputer vision. | |
| 907 |
_a.b16116938 _b2025-07-18 _c2019-11-12 |
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| 942 |
_c01 _n0 _kTK7885.7.J436 3 |
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| 914 | _avtls003583361 | ||
| 990 | _ark4 | ||
| 991 | _aFakulti Kejuruteraan dan Seni Bina | ||
| 998 |
_al _b2015-09-04 _cm _da _feng _gsi _y0 _z.b16116938 |
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| 999 |
_c590658 _d590658 |
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