000 01430nam a2200373 a 4500
005 20250918145324.0
006 m d
007 cr nn 008maaau
008 110924s2009 mau s j eng d
020 _a9780387096711 (electronic bk.)
035 _a(Springer)978-0-387-09670-4
039 9 _a201110031814
_bruzita
_c201109241433
_druzita
_y09-24-2011
_zruzita
090 _aQA76.9.A3
_bC268 2009
100 1 _aCardoso, Joao M.P.
245 1 0 _aCompilation techniques for reconfigurable architectures
_h[electronic resource] /
_cby Joao M.P. Cardoso, Pedro C. Diniz.
260 _aBoston, MA :
_bSpringer Science+Business Media, LLC,
_c2009.
300 _axii, 223 p. :
_bill., digital ;
_c24 cm.
650 0 _aAdaptive computing systems.
650 0 _aCompilers (Computer programs)
650 0 _aField programmable gate arrays.
650 1 4 _aComputer Science.
650 2 4 _aProcessor Architectures.
650 2 4 _aElectrical Engineering.
700 1 _aDiniz, Pedro C.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
856 4 0 _uhttps://eresourcesptsl.ukm.remotexs.co/login?url=http://dx.doi.org/10.1007/978-0-387-09671-1
907 _a.b15162758
_b2022-04-06
_c2019-11-12
942 _n0
_kQA76.9.A3 C268 2009
914 _avtls003479379
998 _ae
_b2011-11-09
_cm
_dz
_feng
_gmau
_y0
_z.b15162758
999 _c500523
_d500523