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020 _a9780470031360 (pbk.)
_cRM475.80
039 9 _a200904291645
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040 _aUKM
090 _aTK7871.99.M44B566 3
090 _aTK7871.99.M44
_bB566
100 1 _aBinkley, David M.
245 1 0 _aTradeoffs and optimization in analog CMOS design /
_cDavid M. Binkley
260 _aChichester, England :
_bJohn Wiley & Sons,
_c2007
300 _axv, 594 p. :
_bill. ;
_c25 cm.
504 _aIncludes bibliographical references and index
650 0 _aMetal oxide semiconductors, complementary
_xDesign and construction
856 4 2 _3Publisher description
_uhttp://www.loc.gov/catdir/enhancements/fy0743/2007037318-d.html
907 _a.b14431609
_b2020-10-15
_c2019-11-12
942 _c01
_n0
_kTK7871.99.M44B566 3
914 _avtls003402384
990 _amaa
991 _aJabatan Kejuruteraan Elektrik, Elektronik & Sistem - (KES)
998 _al
_b2009-10-03
_cm
_da
_feng
_genk
_y0
_z.b14431609
999 _c435718
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