000			01423nam a22003615a 4500
005			20250918001910.0
006			m q d
007			cr nn 008maaau
008			100623s2008 ne q j eng d
020			_a9781402085864 (electronic bk.)
020			_a9781402085857 (paper)
035			_a(Springer)978-1-4020-8585-7
039		9	_a201006230857 _bmuhaimin _y02-03-2009 _zmuhaimin
050	0	0	_aTK7874.75 _b.F67 1997
082	0	0	_a621.395 _221
090			_aTK7874.75 _b.B763 2008
100	1		_aBoule, Marc.
245	1	0	_aGenerating Hardware Assertion Checkers _h[electronic resource] : _bFor Hardware Verification, Emulation, Post-Fabrication Debugging and On-Line Monitoring / _cby Marc Boule, Zeljko Zilic.
260			_aDordrecht : _bSpringer Science + Business Media B.V, _c2008.
300			_a280 p. : _bill., digital ; _c24 cm.
650		0	_aOnline data processing.
650		0	_aIntegrated circuits _xVerification.
700	1		_aZilic, Zeljko.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
856	4	0	_uhttps://eresourcesptsl.ukm.remotexs.co/user/login?url=http://dx.doi.org/10.1007/978-1-4020-8586-4
907			_a.b1437559x _b2024-12-12 _c2019-11-12
942			_n0 _kTK7874.75 .B763 2008
914			_avtls003396438
998			_ae0001 _b2009-03-02 _cm _dz _feng _gne _y0 _z.b1437559x
999			_c432318 _d432318