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| 008 | 090212s2006 gw q j eng d | ||
| 020 | _a9783540390978 (electronic bk.) | ||
| 020 | _a9783540390947 (paper) | ||
| 035 | _a(Springer)978-3-540-39094-7 | ||
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_aPATMOS 2006 _d(2006 : _cMontpellier, France) |
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_aIntegrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation (vol. # 4148) _h[electronic resource] : _b16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings / _cedited by Johan Vounckx. |
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_aBerlin Heidelberg : _bSpringer-Verlag GmbH., _c2006 |
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_axvi, 677 p. : _bill., digital ; _c24 cm. |
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_aLecture Notes in Computer Science, _x0302-9743 ; _v4148 |
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_aIntegrated circuits _xVery large scale integration _xComputer-aided design _vCongresses. |
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| 700 | 1 | _aVounckx, Johan. | |
| 700 | 1 | _aAzemard, Nadine. | |
| 700 | 1 | _aMaurine, Philippe. | |
| 710 | 2 | _aSpringerLink (Online service) | |
| 773 | 0 | _tSpringer e-books | |
| 856 | 4 | 0 | _uhttps://eresourcesptsl.ukm.remotexs.co/user/login?url=http://dx.doi.org/10.1007/11847083 |
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