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| 008 | 090212s2006 mau q j eng d | ||
| 020 | _a9780387364957 (electronic bk.) | ||
| 035 | _a(Springer)978-0-387-33399-1 | ||
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| 100 | 1 | _aSutherland, Stuart. | |
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_aSystemVerilog for Design _h[electronic resource] : _bA Guide to Using SystemVerilog for Hardware Design and Modeling / _cby Stuart Sutherland, Simon Davidmann, Peter Flake. |
| 250 | _aSecond Edition. | ||
| 260 |
_aBoston, MA : _bSpringer Science+Business Media, LLC, _c2006. |
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| 300 |
_axxx, 418 pages : _billustration, digital ; _c25 cm. |
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| 650 | 0 | _aVerilog (Computer hardware description language) | |
| 650 | 0 |
_aElectronic digital computers _xDesign and construction. |
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| 650 | 0 | _aComputer simulation. | |
| 700 | 1 | _aDavidmann, Simon. | |
| 700 | 1 | _aFlake, Peter. | |
| 710 | 2 | _aSpringerLink (Online service) | |
| 773 | 0 | _tSpringer e-books | |
| 856 | 4 | 0 | _uhttps://eresourcesptsl.ukm.remotexs.co/user/login?url=http://dx.doi.org/10.1007/0-387-36495-1 |
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