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008 090217s2005 mau j eng d
020 _a9780387239057 (electronic bk.)
020 _a9780387239040 (paper)
035 _a(Springer)978-0-387-23904-0
039 9 _a200902171213
_bmuhaimin
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_dmuhaimin
_c200902021310
_dmuhaimin
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_dmuhaimin
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_zmuhaimin
050 0 0 _aTK7874.75
_b.Q26 2005
082 0 0 _a621.395
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090 _aebook
090 _aTK7874.75
_b.Q1 2005
100 1 _aQin, Zhanhai.
_956863
245 1 0 _aSymbolic Analysis and Reduction of VLSI Circuits
_h[electronic resource] /
_cby Zhanhai Qin, Sheldon X. D. Tan, Chung-Kuan Cheng.
260 _aBoston, MA :
_bSpringer Science + Business Media, Inc.,
_c2005.
300 _axxii, 283 p. :
_bill., digital ;
_c25 cm.
650 0 _aIntegrated circuits
_xVery large scale integration.
650 0 _aSymbolic circuit analysis.
650 1 4 _aEngineering.
650 2 4 _aElectronic and Computer Engineering.
700 1 _aTan, Sheldon X. D.
700 1 _aCheng, Chung-Kuan.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer e-books
856 4 0 _uhttps://eresourcesptsl.ukm.remotexs.co/login?url=http://dx.doi.org/10.1007/b103440
907 _a.b14113028
_b2022-04-06
_c2019-11-12
942 _c01
_n0
_kebook
914 _avtls003368719
998 _ae
_b2008-03-04
_cm
_dz
_feng
_gmau
_y0
_z.b14113028
999 _c407283
_d407283