000 00896nam a2200313 a 4500
005 20250914011306.0
008 981208s1972 xxk 00 eng d
020 _a0198517114
035 _a132961
039 9 _a200107102049
_brahimi
_y08-18-1999
_zload
090 _aTK7868.S9Z49
090 _aTK7868
100 1 _aZissos, D.
_q(Demetrius)
245 1 0 _aLogic design algorithms /
_cby D. Zissos
260 _aLondon :
_bOxford University Press,
_c1972
300 _ax, 458 p. :
_bill. ;
_c25 cm.
440 _aHarwell series
504 _aIndex
590 _a1
650 0 _aSwitching circuits
650 0 _aAlgorithms
907 _a.b11330545
_b2021-05-28
_c2019-11-12
942 _c01
_n0
_kTK7868.S9Z49
914 _avtls000138045
991 _aFakulti Sains Matematik
998 _al
_b1999-05-08
_cm
_da
_feng
_gxxk
_y0
_z.b11330545
999 _c134768
_d134768