Transactions on high-performance embedded architectures and compilers.  I  [electronic resource] / 
 High-performance embedded architectures and compilers I.  HiPEAC.  HiPEAC compilation architecture. 
Per Stenstrom ... [et al.] (eds.). 
 - Berlin, Heidelberg :  Springer-Verlag Berlin Heidelberg,  2007. 
 - xv, 360 p. :  ill., digital ;  24 cm. 
 - Lecture notes in computer science ;  Journal subline.  4050. .
<br/><br/>Includes bibliographical references and index. 
<br/><br/><label>ISBN: </label>9783540715283 (electronic bk.) 9783540715276 (paper) 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Embedded computer systems.<br/>Compilers (Computer programs)<br/>Computer architecture.<br/>Computer Science.<br/>Arithmetic and Logic Structures.<br/>Computer Communication Networks.<br/>Input/Output and Data Communications.<br/>Logic Design.<br/>Processor Architectures.<br/>Programming Languages, Compilers, Interpreters.
<br/><br/><label>Dewey Class. No.: </label>004.16