Siswanto, Meilana <br/><br/>
VLSI implementation of 1/2 code rate viterbi decoder for IEEE P802.15-3a ultra-wideband communication / 
Meilana Siswanto 
 - Bangi :  Institut Kejuruteraan Mikro dan Nanoelektrik, Universiti Kebangsaan Malaysia,  2008 
 - xviii, 207 p. :  ill., charts ;  30 cm. 
<br/><br/>Thesis (M.Sc) - Universiti Kebangsaan Malaysia, 2008 
<br/><br/>References : p. 133-136 
<br/><br/><label>Subjects--Corporate Names: </label><br/>Universiti Kebangsaan Malaysia--Dissertations
<br/><br/><label>Subjects--Topical Terms: </label><br/>Dissertations, Academic--Malaysia<br/>Integrated circuits--Very large scale integration--Design and construction--Data processing<br/>Ultra-wideband devices