Bergeron, Janick. <br/><br/>
Writing Testbenches using System Verilog  [electronic resource] / 
by Janick Bergeron. 
 - Boston, MA :  Springer Science+Business Media, Inc.,  2006. 
 - xxvi, 412 p. :  ill., digital ;  25 cm. 
<br/><br/><label>ISBN: </label>9780387312750 (electronic bk.) 9780387292212 (paper) 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Computer hardware description languages.<br/>Integrated circuits--Verification.<br/>Engineering.<br/>Electronic and Computer Engineering.<br/>Quality Control, Reliability, Safety and Risk.<br/>Computer-Aided Engineering (CAD, CAE) and Design.<br/>Circuits and Systems.
<br/><br/><label>LC Class. No.: </label>TK7885.7  / .B48 2006 
<br/><br/><label>Dewey Class. No.: </label>621.392