MARC details
| 000 -LEADER |
| fixed length control field |
03028nam a22003614a 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
| control field |
20250918164836.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
| fixed length control field |
120713s2011 enka b 001 0 eng |
| 010 ## - LIBRARY OF CONGRESS CONTROL NUMBER |
| LC control number |
2010-048032 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
| International Standard Book Number |
9780470685716 (hbk) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
| International Standard Book Number |
0470685719 (hbk) |
| 039 #9 - LEVEL OF BIBLIOGRAPHIC CONTROL AND CODING DETAIL [OBSOLETE] |
| Level of rules in bibliographic description |
201208021157 |
| Level of effort used to assign nonsubject heading access points |
baiti |
| Level of effort used to assign subject headings |
201207130958 |
| Level of effort used to assign classification |
idah |
| y |
07-13-2012 |
| z |
idah |
| 040 ## - CATALOGING SOURCE |
| Original cataloging agency |
UKM |
| 090 ## - LOCALLY ASSIGNED LC-TYPE CALL NUMBER (OCLC); LOCAL CALL NUMBER (RLIN) |
| Classification number (OCLC) (R) ; Classification number, CALL (RLIN) (NR) |
TK7871.85 V66 3 |
| 090 ## - LOCALLY ASSIGNED LC-TYPE CALL NUMBER (OCLC); LOCAL CALL NUMBER (RLIN) |
| Classification number (OCLC) (R) ; Classification number, CALL (RLIN) (NR) |
TK7871.85 |
| Local cutter number (OCLC) ; Book number/undivided call number, CALL (RLIN) |
.V66 |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
| Personal name |
Voldman, Steven H. |
| 245 10 - TITLE STATEMENT |
| Title |
ESD : |
| Remainder of title |
design and synthesis / |
| Statement of responsibility, etc. |
Steven H. Voldman. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
| Place of publication, distribution, etc. |
Chichester, West Sussex, U.K. : |
| Name of publisher, distributor, etc. |
Wiley, |
| Date of publication, distribution, etc. |
2011. |
| 300 ## - PHYSICAL DESCRIPTION |
| Extent |
xx, 270 p. : |
| Other physical details |
ill. ; |
| Dimensions |
25 cm. |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE |
| Bibliography, etc. note |
Includes bibliographical references and index. |
| 520 ## - SUMMARY, ETC. |
| Summary, etc. |
'The book focuses on both fundamentals of ESD design to construct and integrate a semiconductor chip. It enables ESD engineers to build better products by exploring six key areas- 1) ESD design synthesis 2) I/O design and integration 3) semiconductor chip architecture 4) floor planning 5) power bus design and 6) ESD power clamps. The book is well organised and uses a top down approach, starting by looking at the basics. It takes a look at design synthesis, floor planning and ESD design issues. The book analyses the synthesis of device elements, also the synthesis of ESD circuits and functional circuits. In Chapter 5, the synthesis of ESD power clamps is described, followed by coverage on synthesis of power rails with I/O, ESD and pads in Chapter 6. The integration of special function circuits and special issues is helpfully included in the book before more broad ESD design methodioligies are outlined. The important areas of design rule checking, along with design verification methods, are looked at towards the end of the book, and the last chapter provides the reader with knowledge about useful design tools. In many ways this text is unique. There is currently no other book on the market that addresses ESD design synthesis and its relationaship to the characterisation of test structures and technologies. Focuses on practical design techniques, providing good design practices and rules contains essential information on chip floor-planning and architecture that has not been published in a single book before covers up-to-date technology benchmarking and characterisation uses state-of-the-art examples with detailed discussion includes end-of-chapter design and integration problems'-- |
| Assigning source |
Provided by publisher. |
| 520 ## - SUMMARY, ETC. |
| Summary, etc. |
'The book focuses on both fundamentals of ESD design to construct and integrate a semiconductor chip'-- |
| Assigning source |
Provided by publisher. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
| Topical term or geographic name entry element |
Semiconductors |
| General subdivision |
Protection. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
| Topical term or geographic name entry element |
Integrated circuits |
| General subdivision |
Protection. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
| Topical term or geographic name entry element |
Electrostatics. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
| Topical term or geographic name entry element |
Analog electronic systems |
| General subdivision |
Design and construction. |
| 907 ## - LOCAL DATA ELEMENT G, LDG (RLIN) |
| a |
.b15428783 |
| b |
2019-11-12 |
| c |
2019-11-12 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
| Koha item type |
AM |
| Suppress in OPAC |
No |
| Call number prefix |
TK7871.85 V66 3 |
| 914 ## - VTLS Number |
| VTLS Number |
vtls003508061 |
| 990 ## - EQUIVALENCES OR CROSS-REFERENCES [LOCAL, CANADA] |
| Link information for 9XX fields |
baiti |
| 991 ## - LOCAL NOTE (NAMA FAKULTI/INSTITUT/PUSAT) |
| a |
Fakulti Kejuruteraan dan Alam Bina |
| 998 ## - LOCAL CONTROL INFORMATION (RLIN) |
| Library |
PERPUSTAKAAN LINGKUNGAN KEDUA |
| Operator's initials, OID (RLIN) |
2012-01-07 |
| Cataloger's initials, CIN (RLIN) |
m |
| Material Type (Sierra) |
Printed Books |
| Language |
English |
| Country |
|
| -- |
0 |
| -- |
.b15428783 |