Hierarchical modeling for VLSI circuit testing /

Bhattacharya, Debashis, 1961-

Hierarchical modeling for VLSI circuit testing / by Debashis Bhattacharya and John P. Hayes. - Boston : Kluwer Academic Publishers, 1990 - 159 p. : ill. ; 23 cm.

079239058X RM203.11


Integrated circuits--Very large scale integration--Testing.
Integrated circuits--Very large scale integration--Computer simulation.

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