Formal specification and verification in VLSI design /

Davie, Bruce S.,

Formal specification and verification in VLSI design / Bruce S. Davie. - ix, 195 pages : illustrations ; 23 cm. - Edinburgh information technology series ; 8 .

Includes bibliographical references (pages 184-193) and index.

0748601597 Hadiah


Integrated circuits--Very large scale integration--Computer-aided design.
Integrated circuits--Verification.

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