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Design of cost-efficient interconnect processing units Spidergon STNoC /

Design of cost-efficient interconnect processing units Spidergon STNoC / [electronic resource] : Marcello Coppola - Boca Raton : Taylor & Francis, 2009 - System-on-chip design and technologies ; 2 .

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Includes bibliographical references and index

ISBN: 9781420044713

LCCN: 2008-026558

Subjects--Corporate Names:
ST Microelectronics

Subjects--Topical Terms:
Networks on a chip
Microprocessors

Dewey Class. No.: 004.1

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Design of cost-efficient interconnect processing units Spidergon STNoC /

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