Verification Methodology Manual for SystemVerilog
Verification Methodology Manual for SystemVerilog [electronic resource] /
by Janick Bergeron, Eduard Cerny, Alan Hunter, Andrew Nightingale.
- Boston, MA : Synopsys, Inc. and ARM Limited, 2006.
- xvii, 503 pages : illustration, digital ; 24 cm.
9780387255569 (electronic bk.)
Verilog (Computer hardware description language)
Integrated circuits--Verification.
Engineering.
Electronic and Computer Engineering.
Electronics and Microelectronics, Instrumentation.
Computer-Aided Engineering (CAD, CAE) and Design.
Circuits and Systems.
TK7885.7 / .V44 2006
621.392
9780387255569 (electronic bk.)
Verilog (Computer hardware description language)
Integrated circuits--Verification.
Engineering.
Electronic and Computer Engineering.
Electronics and Microelectronics, Instrumentation.
Computer-Aided Engineering (CAD, CAE) and Design.
Circuits and Systems.
TK7885.7 / .V44 2006
621.392