Logic-timing simulation and the degradation delay model /
Bellido, Manuel J., 1964-
Logic-timing simulation and the degradation delay model / Manuel J. Bellido, Jorge Juan, Manuel Valencia - London : Imperial College Press, 2006 - xvii, 267 p. : ill. ; 24 cm.
Includes bibliographical references
1860945899 (hb) RM147.42 9781860945892 (hb)
Timing circuits
Integrated circuits--Very large scale integration
Metal oxide semiconductors, Complementary
TK7868.T5 / B385
Logic-timing simulation and the degradation delay model / Manuel J. Bellido, Jorge Juan, Manuel Valencia - London : Imperial College Press, 2006 - xvii, 267 p. : ill. ; 24 cm.
Includes bibliographical references
1860945899 (hb) RM147.42 9781860945892 (hb)
Timing circuits
Integrated circuits--Very large scale integration
Metal oxide semiconductors, Complementary
TK7868.T5 / B385